CDA 5106 -Advanced Computer Architecture

Fall 2017

Class description: Modern processor design, instruction-level parallelism, thread-level parallelism, data-level parallelism, memory hierarchy, and I/O.
Course objectives: By the end of the semester each student will be able to:
  • understand the architectural principles of modern CPUs and memory hierarchies
  • understand the way in which parallelism manifests itself in modern computer systems at the instruction, thread or program level
  • use the knowledge of computer architecture to improve the performance of software
Instructor: Dr. Lotzi Bölöni
Office: HEC - 319
Phone: (407) 243-8256 (on last resort)
E-mail: (preferred means of communication)
Grader: Rouhollah Rahmatizadeh -
Web Site:
The assignments and the other announcements will be posted on the course web site
Classroom: HPA1 125
Class Hours: Mon, Wed 6:00PM - 7:15PM
Office Hours: Mon, Wed 4:30PM - 5:45PM
Pre-requisites: EEL 4768C or equivalent undergraduate computer organization class
Required texts: No required textbook.
Recommended readings:
  • Hennessy and Patterson: Computer Architecture: A Quantitative Approach 5th edition
  • Patterson, Hennessy: Computer Organization and Design (any recent version)
  • Only full grades will be used based on the points obtained. A for 90 and above, B for 80-89, C for 70-79, F for lower than 70.
  • Points awarded: Midterm 1: 20 points, Midterm 2: 20 points, Homeworks: 30 points total, Final exam 30 points.
  • Some midterms, exams and homeworks will have bonus points, but no curve will be applied.
  • All the exams are open book, open notes. E-books on phones or tablets are acceptable (they must be in airplane mode). Laptops should not be used on exams.
  • Make up exams will be given only in justified cases.
Integrity: The department, college, and University are committed to honesty and integrity in all academic matters. We do not tolerate academic misconduct by students in any form, including cheating, plagiarism and commercial use of academic materials. Please consult the Golden Rule Handbook for the procedures which will be applied.
Verification of engagement: As of Fall 2014, all faculty members are required to document students' academic activity at the beginning of each course. In order to document that you began this course, please complete the following academic activity by the end of the first week of classes, or as soon as possible after adding the course, but no later than August 27. Failure to do so will result in a delay in the disbursement of your financial aid.
To satisfy this requirement, you must finish the first quiz posted online. Log in to Webcourses, choose CDA 5106, and submit your answers online.


Lecture Notes, Readings, Homeworks
Mon, Aug 21
Basics: Computer organization
  • Components of computers
  • Why is computer architecture relevant?
[slides] Review-01 - Computer organization and performance
Wed, Aug 23
  • How do we measure performance?
Mon, Aug 28
  • Components of processor performance

Wed, Aug 30
Basics: Instruction sets
  • The MIPS instruction set
  • Comparing the MIPS instruction set with other instruction sets

[slides] Review-02 - Instruction sets
Quick MIPS tutorial
WeMIPS MIPS simulator - online access
WeMIPS MIPS simulator - source code
SPIM simulator for MIPS

Mon, Sep. 4
Labor day - no class

Wed, Sept. 6
Basics: Processor architecture
Basics: Processor pipelining
MIPS instruction formats
[slides] Review-03 - Processor architecture

Mon, Sept. 11
UCF closed due to Hurricane Irma

Wed, Sept. 13 UCF closed due to Hurricane Irma

Mon, Sept. 18
Basics: Pipeline hazards

Wed, Sept. 20 Basics: Memory hierarchies
[slides] Review-04 - Memory hierarchies
Mon, Sept. 25
Memory hierarchies cont'd

Wed, Sept. 27
Memory hierarchies cont'd

Mon, Oct. 2
Basics: Virtual memory
[homework] Homework 1 - due October 16
Wed, Oct. 4
Midterm exam review

Mon, Oct. 9

Wed, Oct. 11
Midterm 1

Mon, Oct. 16

Wed, Oct. 18
Memory and cache optimization
[slides] Memory optimizations
Mon, Oct. 23
Memory and cache optimization - cont'd

Wed, Oct. 25
Instruction-level parallelism
[slides] Instruction-level parallelism
Mon, Oct. 30
Instruction-level parallelism - cont'd
[homework] Homework 2 - due November 13
Online simulator for Tomasulo's algorithm
Wed, Nov. 1
Data-level parallelism
[slides] Data-level parallelism
Mon, Nov. 6
Data-level parallelism - cont'd

Wed, Nov. 8
Thread-level parallelism
[slides] Thread-level parallelism
[notes] Snoopy cache coherence notes
Mon, Nov. 13
Thread-level parallelism - cont'd
[notes] Directory-based cache coherence notes

Wed, Nov. 15
Midterm 2

Mon, Nov. 20
Thread level parallelism - cont'd
Wed, Nov. 22
Request level parallelism
The architecture of data centers
Introduction to cloud computing
[slides] Cloud Computing
Mon, Nov. 27
Cloud computing models
Advantages and disadvantages of cloud computing
Map-Reduce and its implications
[homework] Homework 3 - due Dec 7
[slides] MapReduce - the paradigm
[slides] MapReduce - examples
[slides] MapReduce - scheduling
[slides] MapReduce - fault tolerance
[slides] MapReduce - scheduling queues
Wed, Nov. 29
Request level parallelism
VMs, Containers, Kubernetes
Micro-service architectures

Final exam Wednesday, December 06, 2017, 4:00 PM - 6:50 PM