EEL 5708 - High Performance Computer Architectures

Fall 2006

Instructor: Dr. Lotzi Bölöni
Office: Harris Center (ENGR 3) - 319
Phone: 407-823-2320
Web Site:
The assignments and the other announcements will be posted on the course web site
Classroom: Engr I. 388
Class Hours: Monday, Wednesday and Friday 8:30 - 9:20
Office Hours: Monday 9:30-12:30, Tuesday 3:00-6:00 or by appointment
Pre-requisites: An undergraduate level course in computer organization. Assembly programming. Basic knowledge of digital logic and microprocessors.
If you are not confident that you have the pre-requisites, a good catch-up book is:
David A. Patterson, John L. Hennessy: Computer Organization and Design: The Hardware/Software Interface, Third Edition
Text: Patterson, Hennessy: Computer Architecture, A Quantitative Approach third edition
Streaming video:
Note: account name and password is required.
Grading: Homework: 20 %
Midterm Exam: 30 %
Final Exam: 50 %

Standard 90/80/70/60 scale will be used for final grades (curved if necessary)

Goto: Links, Syllabus, Grades


Lecture Notes, Readings, Homeworks
Aug. 21
Introductory Quiz
[slides] Introduction
Aug. 23
-Two case studies

Aug. 25
The big picture
[slides] The Big Picture,
[reading] Amdahl et. al. on the IBM 360
Aug. 28
-Instruction sets
[slides] Review: Instruction sets,
[reading] Richard Russel: The Cray-1 Computer System,
Aug. 30
-Instruction sets

Sep. 1
-Assembly language programming
Homework 1
Sep. 4
Labor day

Sep. 6
-MIPS instruction set
[reading] MIPS instruction set reference
[reading] MIPS architecture
Sept 8.
Basic pipelining
[slides] Pipelining
Sept 11.
Sep. 13
Homework 1 due
Sep. 15
Branch alternatives
Sep. 18
Instruction level paralelism
[slides] Instruction level parallelism
Sep. 20
-Dynamic branch prediction with Tomasulo's algorithm
[slides] Tomasulo's algorithm
Homework 2
Sep. 22
-Tomasulo's algorithm.

Sep. 25
-Loop unrolling
(Lecture by Linus Luotsinen)

Sep. 27
-Compiler perspectives on code movement.
(Lecture by Linus Luotsinen)

Sep. 29 -Speculation
[slides] Speculation
[reading] J.E.Smith and A.R. Pleszkun: Implementing precise interrupts in pipelined processors
Oct. 2

Oct 4.
-Superscalar processors
Oct. 6
Homework 2 due

Oct. 9
Midterm review session
Oct. 11
Oct. 13
-Memory technology [slides] Memory technology
Oct. 16
-Caches [slides] Caches
Oct. 18

Oct. 20

Oct. 23

[reading] Vikas Agarwal, M.S. Hrishikesh, Stephen W. Keckler and Doug Burger - Clock Rate versus IPC: The End of The Road for Conventional Microarchitectures
[reading]Wm. A. Wulf and Sally A. McKee: "Hitting the Memory Wall: Implications of the Obvious" by
Homework 3
Oct. 25

Oct. 27

Oct. 30

Nov. 1

Nov. 3
Main memory organization
[slides] Main memory
Nov. 6
Multiprocessor systems
[slides] Multiprocessors

Nov. 8

Homework 3 due
Nov. 10
Veteran's day

Nov. 13
[slides] NUMA
Nov. 15

Nov. 17

Nov. 20

Nov. 22

Nov. 24
Day after Thanksgiving

Nov. 27

Nov. 29
Networking and cluster computers. Case study: Google.
[slides] Clusters. Google.
Dec. 2
Final exam review

Final Exam


Note that the grades are organized based on the randomly generated unique identifiers for the class. If you did not receive your identifier, please contact me.